Cadence LPDDR4/4X Memory IP Subsystem Achieves ISO 26262 ASIL C Certification From SGS-TÜV Saar Using TSMC 16FFC Process Technology

Cadence IP is complete and ready for use by customers creating SoCs
for ADAS and L3/L4 autonomous driving applications

SAN JOSE, Calif.–(BUSINESS WIRE)–lt;a href=”” target=”_blank”gt;#EDAlt;/agt;–Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the
Cadence® LPDDR4/4X memory IP subsystem, utilizing TSMC’s 16nm
FinFET Compact (16FFC) technology, has achieved ISO 26262 ASIL C
certification from SGS-TÜV Saar. The certification confirms that the
Cadence IP is complete and ready for use by customers creating advanced
systems-on-chip (SoCs) for advanced driver assistance systems (ADAS) and
L3/L4 autonomous driving applications.

“High-performance memory subsystems are essential elements in ADAS and
autonomous driving applications and must be developed to meet more
stringent requirements,” stated Wolfgang Ruf, product manager,
Semiconductors, at SGS-TÜV Saar. “Following a rigorous evaluation, the
Cadence LPDDR4/4X PHY and controller subsystem has been certified by
SGS-TÜV Saar in accordance with the ISO 26262 standard and is ASIL C
ready, allowing SoC designers to use this high-performance subsystem as
a critical design element in ASIL C systems.”

Both established and new entrants into the automotive market—start-ups,
OEMs and internet companies—have to cope with meeting stringent
functional safety requirements. To ease the delivery of safety-critical
applications, design teams need access to proven, ISO 26262 ASIL C-ready
IP such as the Cadence LPDDR4/4X memory subsystem, which includes the
leading-edge Cadence 4266 speed grade LPDDR4/4X DDR PHY, controller IP,
and Cadence VIP. For more information on the LPDDR4/4X memory IP
subsystem, please visit

“We’re pleased with the results of our ongoing collaboration with
Cadence in developing a robust, comprehensive set of IP that enables
today’s complex automotive designs for ADAS and autonomous driving
applications,” said Suk Lee, TSMC senior director, Design Infrastructure
Management Division at TSMC. “The automotive-grade LPDDR4/4X design IP
from Cadence is silicon-proven on TSMC’s 16nm FinFET technology, an
industry-leading process for advanced automotive applications, including
ADAS and autonomous driving chips where ISO 26262 ASIL C readiness is a
critical requirement for processor and memory subsystem functionality.”

“The most critical aspect of advanced SoCs for ADAS, autonomous driving
and other automotive systems is the processor and memory subsystem,
which has stringent functional safety requirements,” said Amjad Qureshi,
corporate vice president of R&D, Design IP Group, at Cadence. “We’ve
collaborated closely with our automotive customers, SGS-TÜV Saar and
TSMC to complete the functional safety analysis and auditing process to
achieve ISO 26262 ASIL C-ready certification, and customers can now
confidently use our high-performance LPDDR PHYs and controllers in
their automotive designs.”

About Cadence

Cadence enables electronic systems and semiconductor companies to create
the innovative end products that are transforming the way people live,
work and play. Cadence software, hardware and semiconductor IP are used
by customers to deliver products to market faster. The company’s System
Design Enablement strategy helps customers develop differentiated
products—from chips to boards to systems—in mobile, consumer, cloud
datacenter, automotive, aerospace, IoT, industrial and other market
segments. Cadence is listed as one of Fortune Magazine’s 100 Best
Companies to Work For. Learn more at

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